Clean Room Packed
Ultra-Flat Silicon Wafers

Ultra-Flat 4" Silicon Wafers

Ultra-Flat 4" Silicon Wafer for demanding substrate studies. Can also be used as substrate for AFM or SEM samples by dicing the wafer into smaller pieces using a Scriber and the Wafer Cleaving / Glass Breaking Pliers. The 4" ultra-flat silicon wafer is shipped in a  4" wafer carrier.

Properties for 4" (100mm) Ultra-Flat Wafer:

• Orientation: <100>
• Type/Dopant: P/Boron
• Grade: Prime / CZ Virgin
• Resistivity: 10-20 Ohm-cm
• Thickness: 525µm +/- 20µm
• TTV: <4.00µm
• SFPD: <2.0µm
• Warp: ≤30µm
• Bow: ≤20µm
• Particles: ≤[email protected]≥0.3µm
• Front Surface: Polished
• Back Surface: Etched
• Flat: 2 per SEMI Standard
• Site Flatness: <2.0µm
• Roughness: Typically 2-3Å

Ultra-Flat 6" Silicon Wafers

Ultra-Flat 6" diameter Silicon Wafer for demanding substrate studies. The 6" ultra-flat silicon wafer is shipped in a 6" wafer carrier.

Also available as 5 x 5mm, 5 x 7mm, 10 x10mm stealth-diced dies in Gel-Pak^® boxes. Stealth dicing eliminates edge-chipping and cutting debris associated with saw dicing, providing the cleanest, most uniform product possible. All products are packed in class 10 clean room conditions.

Properties for 6" (150mm) Ultra-Flat Wafer:

• Material: CZ Virgin Silicon Wafer
• Grade: Prime
• Diameter: 150mm
• Orientation: <100>
• Type/Dopant: P/Boron
• Resistivity: 10-20 ohm-cm
• Thickness: 675µm +/- 20µm
• TTV: ≤2µm
• Site Flatness: <=1µm
• Warp: ≤30µm
• Bow: ≤20µm
• Particles: ≤[email protected]≥0.2µm
• Front Surface: Polished
• Back Surface: Etched
• Flat: 1 per SEMI Standard

Ultra-Flat Thermal SiO2 Substrates

The Ultra-Flat SiO2 substrates consist of a 200nm thermally grown amorphous SiO2 film on an ultra-flat silicon wafer. SiO2 is one of the most characterized materials and is widely used in semiconductor manufacturing, thin film research and as substrate for growing cells. It can be directly used as substrate for AFM and SEM imaging. The ultra-flat thermal silicon dioxide substrates are available in 6" wafer and conveniently diced 5 x 5mm, 5 x 7mm and 10 x 10mm chips. The 6" wafer is shipped in a 6" wafer carrier, the diced pieces are shipped in a Gel-Pak^® box.

The special clean dicing process involves coating the wafer with photo resist before dicing and removing it after dicing which produces debris-free SiO2 substrates. All products are packed in class 10 clean room conditions.

Properties for thermal SiO2 substrates:

• Material: CZ Virgin Silicon Wafer
• Grade: Prime
• Diameter: 150mm
• Orientation: <100>
• Type/Dopant: P/Boron
• Resistivity: 10-20 Ohm-cm
• Thickness: 675 +/- 25µm
• TTV: ≤2µm
• Site Flatness: ≤1µm
• Warp: ≤30µm
• Bow: ≤20µm
• Particles: ≤[email protected]≥0.2µm
• Front Surface: Polished
• Back Surface: Etched
• Flat: 1 per SEMI Standard
• 2000A +/- 5% Thermal Oxide

• Film thickness: 50nm ultra low stress Si3N4 on both sides
• Disc thickness: 200µm silicon support
• Disc diameter: 3mm
• Surface roughness: The RMS (Rq) is 0.65 +/- 0.06nm which gives a mean roughness (Ra) of 0.45 +/- 0.02nm
• Packaging The PELCO^® Silicon Nitride Discs are packaged under cleanroom conditions in a vial holding 10 discs.

MSDS (367KB PDF)